Performance
Issues of Variability Design in Embedded System
Application Families
Researcher:
Oliver Lewis
Date
completed:
November 2000. PhD awarded.
Papers
published:
Lewis O, Mannion M and Buchanan WJ, "Performance
Issues of Variability Design for Embedded System
Product Lines", 22nd International Conference
on Software Engineering (ICSE), Limerick, June 2000.
Lewis O, Mannion M and Buchanan WJ, "Performance
Issues of Variability Design for Embedded System
Product Lines", Fraunhofer IESE Technical Report
070.00/E.
Abstract:
In seeking to gain a competitive edge, companies
are searching for alternative methods for developing
computer-based systems more effectively and efficiently.
Application family engineering is seen as one potential
solution.
A
principal idea of application family engineering
is to identify commonalities and variability among
systems of a family, into analysis, design and code
assets. New systems can be generated from these
assets by filtering out requirements, design and
code solutions that do not trace
to the particular needs of the new system. The embedded
systems industry has been reluctant to embrace application
family engineering and other reuse methods, because
of a concern that application family assets include
provisions for variability that may bear an unpredictable
execution time and memory space overhead. In environments
where time and space are in short supply, reuse
(and maintenance) may be undesirable. However, there
is little empirical evidence to support this concern.
In
this work we investigate the behaviour of the potential
time and space overhead incurred by one design mechanism
for managing variability in application family designs:
common interfaces. Our approach is case study based
and compares the performances of systems with one-off
designs with no variability to the same systems
ix having application family designs with variability.
Five common interface techniques for handling variability
are examined, based on the components of five prevalent
architectural styles, including Object-Orientation,
Main/Subroutine, Event-Based, Pipe and Filter, and
Repository architectural styles. For each architectural
style we selected a case study application family
that may typically be designed using that style.
Our results show that all five architectural styles
exhibit a clear correlation
between execution time and memory space overhead,
and the amount of variability. Our data implies
that although a trade-off between reuse and performance
may exist, it can be predictable and possibly even
quantified. The implication that overhead can be
predicted and possibly quantified may help decide
the economic viability of reusing application family
assets in an embedded environment.